Lateral-only photoresist trimming for sub-80 nm gate stack

ABSTRACT

The invention relates generally to lithographic patterning of very small features. In particular, the invention relates generally to patterning of semiconductor circuit features smaller than lithographically defined using either conventional optical lithography or next generation lithography techniques. The invention relates more particularly, but not by way of limitation, to lateral trimming of photoresist images.

FIELD OF THE INVENTION

[0001] The invention relates generally to lithographic patterning ofvery small features. In particular, the invention relates generally topatterning of features smaller than lithographically-defined usingeither conventional optical lithography or next generation lithographictechniques such as e-beam, euv, or x-ray. The invention relates moreparticularly, but not by way of limitation, to lateral trimming ofphotoresist (PR) images.

BACKGROUND

[0002] The rapid shrinking of gate dimensions of CMOS devices has ledthe gate line width down to the sub-100 nm regime. For example, thephysical line width of the polysilicon gate required for IBM's CMOS 9Stechnology generation is about 90 nanometers. From a lithography processstandpoint, current capabilities with 248 nanometer DUV systems, inconjunction with phase shift mask technology and a single layer resistwith thickness of about 450 nanometers, are limited to about 120nanometers. The resist thickness is limited by the shrinking depth offocus needed to resolve the smaller features. FIG. 1 illustrates thesituation, where the post-lithography line width, W₀, is about 120nanometers and the height, H₀, is about 450 nanometers. In order to makethe gate stack line width smaller than 120 nanometers, a PR trimmingstep must be used to shrink the lateral dimension, W₀. Currenttechnologies use plasmas (containing O₂, Ar, etc.) to trim/shrink thedimension of PR masks. The two major limitations of the currenttechnologies are 1) the vertical etch rate of the PR is about threetimes the lateral etch rate, and 2) the vertical etch rate of the (PR)is about equal the vertical etch rate of the anti-reflective coating(ARC), and is also approximately equal to the etch rate of the hardmask, i.e., the oxide.

[0003] The final width and height of the mask stacks, W₁ and H₁, aredetermined by W₀ and H₀ and the vertical and lateral etch rates of themask and stack. Currently, the smallest line width fabricated by usingthe PR trim techniques is about 80-90 nanometers. Two known alternativesto achieve smaller dimensions include the use of e-beam direct writingor x-ray lithography. Line widths approximating 50 nanometers can beachieved with e-beam direct writing but the throughput is too slow formass production. Many challenges have hindered the wide use of x-raylithography in the IC industry, such as fabrication of the 1X mask, maskmaterials, mask reliability, overlay correction capabilities andlimitations in throughput enhancement capabilities.

[0004] Other objects and advantages of the present invention will becomeapparent from the following disclosure.

SUMMARY OF INVENTION

[0005] Whereas the narrowest linewidth capable of being fabricated bycurrent photoresist trim techniques is about 80-90 nanometers, it istherefore desired to have a photoresist trimming technique capable offabricating narrower lines. Therefore, an aspect of the presentinvention provides a method for producing a lithographically printedimage having a reduced critical dimension, the method comprising thesteps of:

[0006] (a) providing a semiconductor substrate optionally having ahardmask defined thereon;

[0007] (b) providing an underlayer on the substrate or the optionalhardmask wherein the underlayer is substantially free of any elementthat forms a non-volatile oxide; (Non-limiting examples of elements thatform non-volatile oxides include: silicon, boron, phosphorous,germanium, and aluminum.)

[0008] (c) providing a PR layer on the underlayer, wherein the PR layercomprises an element that forms a non-volatile oxide, e.g. silicon,boron, phosphorous, germanium, or aluminum (non-limiting examples);

[0009] (d) imagewise exposing the PR layer to radiation forming an imagein the PR;

[0010] (e) transferring the image into the underlayer; and

[0011] (f) performing a controlled etch and overetch of the underlayer.

[0012] Whereas current lateral trim techniques result in an undesiredloss in the original height of the resist image, an aspect of thecurrent invention provides means for achieving lateral trim of the finaltransferred image with substantial retention of the original imageheight.

[0013] An aspect of the current invention is significant retention of aPR layer during the transfer etch into the underlayer.

[0014] An aspect of the invention provides a radiation sensitive resistcomprising an element that forms a non-volatile oxide, e.g. silicon,boron, phosphorous, germanium, or aluminum (non-limiting examples).

[0015] An aspect of the invention provides means of passivating theresist image against etching.

[0016] An aspect of the invention provides passivation means byformation of non-volatile oxide species, e.g. SiO species (non-limitingexample).

[0017] Whereas control over the final critical dimension of the resistimage is desired, an aspect of the current invention provides means ofcontrolling the image critical dimension.

[0018] An aspect of the invention is to provide plasma etching totransfer the resist image into the underlayer.

[0019] An aspect of the invention is to provide oxygen as the reactivespecies.

[0020] An aspect of the invention provides a thick (about 0.4 to about2.0 micron) ARC or underlayer between the substrate surface and the PRlayer. Where the composition of the ARC is modified, thin ARC layersapproximately 0.05 microns thick may be obtained.

[0021] An aspect of the present invention provides the underlayer besubstantially free of any element that forms a non-volatile oxide, e.g.silicon, boron, phosphorous, germanium, or aluminum (non-limitingexamples).

[0022] An aspect of the present invention provides the underlayer islaterally trimmed using plasma-generated, reactive oxygen species.

[0023] An aspect of the present invention provides means of controllingthe amount of material etched laterally.

[0024] An aspect of the present invention provides means for alteringthe lateral etch rate by admixing a non-reactive diluent gas, such as anoble gas or a reactive gas, such as SO₂.

[0025] An aspect of the present invention provides means for controllingthe lateral etch rate by controlling the plasma processing conditions,e.g. top power, bottom power, ambient pressure, gas flow rates, andtemperatures.

[0026] An aspect of the present invention provides means for controllingthe lateral etch rate by regulating the etch duration.

[0027] Whereas it is desired, by using conventional optical lithographictechniques to fabricate semiconductor devices having feature sizessmaller than about 80-90 nanometers, an aspect of the present inventionprovides means of manufacturing semiconductor devices having reducedcritical dimensions using conventional lithography.

[0028] An aspect of the present invention provides means for fabricatingbilayer resist images having reduced critical dimension.

[0029] An aspect of the present invention is the inventive reducedcritical dimension bilayer resist image comprising: a semiconductorsubstrate; an organic layer provided on the substrate; and a photoresistlayer provided on the organic layer, wherein the photoresist layer has afirst image developed therein, and wherein the organic layer has asecond image, of reduced critical dimension and congruent with the firstimage, developed therein.

[0030] An aspect of the present invention provides a method of using thereduced critical dimension bilayer resist image comprising the steps of:(a) providing a substrate; (b) forming a reduced critical dimensionbilayer resist image on the substrate; (c) transferring the image intothe substrate forming a circuit image; and (d) forming circuit elementmaterials in the circuit image.

[0031] An aspect of the present invention provides the semiconductordevice fabricated using the inventive reduced critical dimension bilayerresist image.

[0032] Still other objects and advantages of the present invention willbecome readily apparent by those skilled in the art from the followingdetailed description, wherein it is shown and described preferredembodiments of the invention, simply by way of illustration of the bestmode contemplated of carrying out the invention. As will be realized theinvention is capable of other and different embodiments, and its severaldetails are capable of modifications in various obvious respects,without departing from the invention. Accordingly, the description is tobe regarded as illustrative in nature and not as restrictive.

BRIEF DESCRIPTION OF DRAWINGS

[0033] The invention is best understood from the following detaileddescription when read in connection with the accompanying drawing. It isemphasized that, according to common practice, the various features ofthe drawing are not to scale. On the contrary, the dimensions of thevarious features are arbitrarily expanded or reduced for clarity.Included in the drawing are the following figures:

[0034] It is to be noted, however, that the appended drawings illustrateonly typical embodiments of this invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

[0035]FIG. 1 schematically shows the mask definition technique used topattern sub-100 nm gates;

[0036]FIG. 2 schematically shows the ability to perform lateral-only PRtrimming using bilayer PR masks;

[0037]FIG. 3 shows the results obtained from the lateral-only trimmingexperiments using bilayer resists; and

[0038]FIG. 4 shows the reduction in critical dimension of an isolatedline after it was 60% overetched in an O₂ plasma.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

[0039] Reference is made to the figures to illustrate selectedembodiments and preferred modes of carrying out the invention. It is tobe understood that the invention is not hereby limited to those aspectsdepicted in the figures. As a matter of lexicographic convenience, theterms “underlayer,” “organic underlayer,” “anti-reflective coat,” and“ARC” are used interchangeably.

[0040] The present invention relates to a process for generating apositive bilayer PR image, of reduced critical dimension, on a substratecomprising the steps of: (a) coating a substrate with an organicunderlayer; (b) coating the organic underlayer with a top layercomprising a radiation-sensitive acid generator and a polymer having asilicon-containing, acid-cleavable group; (c) imagewise exposing the toplayer to radiation; (d) developing the image in the top layer; (e)transferring the image through the organic underlayer down to thesubstrate; and (f) reducing the critical dimension of the transferredimage in the underlayer (lateral trimming).

[0041] Turning now to FIG. 2, which schematically shows the ability toperform lateral-only PR trimming using bilayer PR masks, the top layerof the bilayer mask 7 is oxidized in the process drastically reducingits vertical etch rate. The lower layer of the bilayer mask 6 reactswith the species produced in the plasma and undergoes the desirablelateral trim. The left and right sides, FIGS. 2A and 2B, show the samestructure, respectively, before and after trimming. A semiconductorsubstrate 1 is provided. In the present example, at least a portion ofthe front-end-of-the-line (FEOL) fabrication has been performed. TheFigure indicates a silicon substrate 2 with gate electrode 3 thereonprovided and thereon successive layers of poly gate 4 and hardmask 5.

[0042] The first step of the process of the present invention involvescoating the substrate with a layer comprising an organic polymerdissolved in a suitable solvent. Suitable substrates include silicon,silicon-germanium (SiGe), gallium arsenide (GaAs), silicon-on-insulator(SOI), and may comprise a stack of films. Suitably, the surface of thesubstrate is cleaned by standard procedures before the layer is disposedthereon. Suitable solvents for the ARC layer include propylene glycolmethyl ether acetate (PGMEA). The layer can be coated on the substrateusing art-known techniques such as spin or spray coating, or may beapplied by squeegee. The layer is then heated to an elevated temperatureof about 100-250° C. for a short period of time of about 1-30 minutes todrive off solvent and optionally to induce thermally-mediatedcrosslinking. The dried underlayer 6 has a thickness of about 0.4-20microns, preferably about 0.8 microns.

[0043] In a first embodiment of the present invention, a semiconductorwafer, processed through the hardmask, forms the initial input. Thehardmask 5 is coated with an underlayer 6 comprising a tuned polymer.The thickness of underlayer 6 should be from about 400 nanometers toabout 2000 nanometers and preferably about 800 nanometers. Theproperties of underlayer 6 should be optimized. The optical propertiesshould include a refractive index (n) at the imaging wavelength of fromabout 1.7 to about 1.9. The optical properties should include anextinction coefficient (k) of from about 0.20 to 0.22 at the imagingwavelength of 248 nm. The optical properties of tuned polymer 6 shouldbe relatively stable under a variety of processing conditions.

[0044] It is desirable that the physical properties of the tuned polymer6 include an optimized interaction between the polymer layer and top,imaging layer 7. Polymer layer 6 should be strongly adherent to imaginglayer 7, but polymer layer 6 should not intermix with imaging layer 7.

[0045] Suitable organic, polymeric, planarizing underlayers for theresist of the present invention include novolac. In a preferredembodiment of the invention the tuned polymer is a thermally linked dyedphenolic polymer. Other crosslinkable polymers known to those skilled inthe art can also be used as the underlayer.

[0046] In the second step of the process, the components of the top,imaging layer 7 are dissolved in a suitable solvent such as propyleneglycol methyl ether acetate and coated onto the organic polymerunderlayer 7. It is desired that the imaging layer 7 not admix withunderlayer 6 during the coating process. The top layer has a thicknessof about 0.1 to 0.4 micron and preferably about 0.27 micron.

[0047] In the next step of the process, the film stack 8, comprising thetop imaging layer 7 and underlayer 6 is imagewise exposed to radiation.Suitable radiation includes electromagnetic radiation or electron beamradiation, preferably ultraviolet radiation suitably at a wavelength ofabout 157-365 nm (157/193/248/254/365/and hard and soft x-ray and euv),more preferably 193 or 248 nm. Suitable radiation sources includemercury, mercury/xenon, and xenon lamps. The preferred radiation sourceis an excimer, e.g. ArF, KrF, or F₂. At longer wavelengths (e.g., 365nm) a sensitizer may be added to the top, imaging layer 7 to enhanceabsorption of the radiation. Conveniently, due to the enhanced radiationsensitivity of the top layer of the resist film, the top layer of thefilm has a fast photospeed and is fully exposed with less than about 100mJ/cm² of radiation, more preferably less than about 50 mJ/cm². Theradiation is absorbed by the radiation-sensitive acid generator orsensitizing agent to generate free acid which causes cleavage of thesilicon-containing, acid-cleavable group and formation of thecorresponding carboxylic acid or phenol.

[0048] Preferably, after the film has been exposed to radiation, thefilm is again heated to an elevated temperature of about 90-120° C. fora short period of time of about 1 minute.

[0049] The next step involves development of an image in the top layerwith a suitable solvent. Suitable solvents for development of a highcontrast, positive image include an aqueous base, preferably an aqueousbase without metal ions such as tetramethyl ammonium hydroxide orcholine. The development results in removal of the exposed areas of thetop film.

[0050] The last step of the process involves transferring of thedeveloped image in the top layer 7, through the underlayer 6, andstopping on substrate 1 by known, oxygen-reactive ion etchingtechniques. Oxygen-reactive ion etching techniques are well known in theart and equipment to etch film is commercially available. The developedfilm has high aspect ratio, high etch resistance, enhanced resolution,and straight wall profiles.

[0051] Turning now to FIG. 3, an embodiment of the present inventionprovides control over the extent to which the lateral trimming proceeds.The variation in CD with respect to etching time for isolated lines withtwo different widths is shown in FIG. 3. The lines as photo-imaged were185 nm (L-181) and 220 nm (L-182) before they were transferred into theunderlayer. SEM micrographs of the unetched L-181 sample and 60%overetched L-181 sample are shown in FIG. 4 where one can observe thedrastic reduction in line-width. At the end of the etch (0% overetch),there is a CD loss which can be determined by extrapolating the dashedlines and subtracting this value from the as-imaged CD. As the patternswere overetched longer, an approximately linear decrease in CD wasobserved.

[0052] The extent of lateral trimming can be controlled by varying theduration of etch. The etch rate may be reduced by dilution of the oxygenplasma with non-reactive gasses such as N₂, noble gasses, and othernon-reactive gasses as is known in the art. It is known in the art thatthe etch rate in a plasma ion reactive etch tool may be varied byappropriate control over the RF power, operating pressure, gas flowrate,backside He pressure and electrode and wall temperatures.

[0053] The experimental conditions used for the main etch are summarizedbelow. The overetch step involved extending the main etch step beyondthe 108 sec. duration. For example, a 50% overetch step lasted 54seconds making the duration of the entire etch 162 sec. Tool: Lam TCP9400SE TCP power: 260 W Bias power: 115 W Pressure: 2.5 mTorr O₂ flow:60 sccm Bottom electrode temp.: −10° C. Duration: 108 sec.

[0054] The bilayer resist of the present invention may be used to makean integrated circuit assembly, such as an integrated circuit chip,multichip module, circuit board, circuit formed on a substrate by usingthe process of the present invention, and then additionally forming acircuit in the developed film on the substrate by art-known techniques.After the substrate has been exposed, circuit patterns can be formed inthe exposed areas. The surface of the film can be milled to remove anyexcess conductive material. Dielectric materials may also be depositedby similar means during the process of making circuits. Inorganic ionssuch as boron, phosphorous, or arsenic can be implanted in the substratein the process for making p- or n-doped circuit transistors. Other meansfor forming circuits are well known to those skilled in the art.

[0055] It will, therefore, be appreciated by those skilled in the arthaving the benefit of this disclosure that this invention is capable ofproducing a resist image having a controllably reduced width while theimage substantially retaining its original height. Moreover, it will beappreciated by those skilled in the art having the benefit of thisdisclosure that a further aspect of the invention provides for thefabrication of semiconductor devices. Illustrative, but not limiting ofthe types of semiconductor devices that may be produced using thepresent invention are integrated circuit assemblies, such as anintegrated circuit chips, multichip modules, circuit boards, MEMSdevices, and thin film magnetic heads.

[0056] Although the illustrative embodiments of the invention are drawnfrom the semiconductor arts, the invention is not intrinsically limitedto that art.

[0057] Furthermore, it is to be understood that the form of theinvention shown and described is to be taken as presently preferredembodiments. Various modifications and changes may be made to each andevery processing step as would be obvious to a person skilled in the arthaving the benefit of this disclosure. It is intended that the followingclaims be interpreted to embrace all such modifications and changes and,accordingly, the specification and drawings are to be regarded in anillustrative rather than a restrictive sense. Moreover, it is intendedthat the appended claims be construed to include alternativeembodiments.

What is claimed is:
 1. A method for producing a lithographically printedimage having a reduced critical dimension, the method comprising thesteps of: (a) providing a semiconductor substrate optionally having atleast a hardmask defined thereon; (b) providing an underlayer on saidhardmask wherein said underlayer is substantially free of any elementthat forms a non-volatile oxide; (c) providing a PR layer on saidunderlayer, wherein said photoresist comprises a material capable offorming a non-volatile, etch-resistant oxide; (d) imagewise exposingsaid PR layer to radiation forming an image in said PR; (e) transferringsaid image into said underlayer; and (f) performing a controlledoveretch of said underlayer. plasma etching said underlayer, wherein thereactive species of said plasma comprises oxygen; and performing acontrolled lateral thinning of said underlayer.
 2. A method for reducingthe critical dimension of a lithographically printed feature, accordingto claim 1, wherein said underlayer comprises less than 9% silicon.
 3. Amethod for reducing the critical dimension of a lithographically printedfeature, according to claim 1, wherein said underlayer comprises a tunedpolymer.
 4. A method for reducing the critical dimension of alithographically printed feature, according to claim 1, wherein saidunderlayer is substantially free of any element that forms anon-volatile oxide wherein said element is selected from the groupconsisting of silicon, boron, phosphorous, germanium, and aluminum.
 5. Amethod for reducing the critical dimension of a lithographically printedfeature, according to claim 1, wherein said photoresist comprises anelement capable of forming a non-volatile, etch-resistant oxide selectedfrom the group consisting of silicon, boron, phosphorous, germanium,and.
 6. A method for reducing the critical dimension of alithographically printed feature, according to claim 1, wherein thereactive species of said plasma comprises an element selected from thegroup consisting of oxygen, hydrogen, fluorine, and chlorine.
 7. Amethod for reducing the critical dimension of a lithographically printedfeature, according to claim 1, wherein said underlayer comprises a tunedpolymer comprising carbon, hydrogen, and oxygen.
 8. A method forreducing the critical dimension of a lithographically printed feature,according to claim 1, wherein said underlayer comprises anantireflective coating.
 9. A method for reducing the critical dimensionof a lithographically printed feature, according to claim 1, whereinsaid PR comprises a radiation-sensitive acid generator.
 10. A method forreducing the critical dimension of a lithographically printed feature,according to claim 1, wherein said photoresist comprises a polymerhaving acid-cleavable moieties bound thereto.
 11. A method for reducingthe critical dimension of a lithographically printed feature, accordingto claim 1, wherein said photoresist comprises a polymer formed bypolymerizing one or more monomers selected from the group consisting ofacrylate, methacrylate, hydroxystyrene optionally substituted withC₁₋₆-alkyl, C₅₋₂₀ cyclic olefin monomers, and combinations thereof, thepolymer having acid-cleavable moieties bound thereto, wherein all suchmoieties are silylethoxy groups optionally substituted on the ethoxyportion thereof with C₁₋₆-alkyl, phenyl, or benzyl.
 12. A method forreducing the critical dimension of a lithographically printed feature,according to claim 1, wherein said radiation is selected from the groupconsisting of electromagnetic radiation, 157-365 nm ultravioletradiation, euv, electron beam radiation, and hard and soft x-rayradiation.
 13. A method for reducing the critical dimension of alithographically printed feature, according to claim 1, wherein saidradiation comprises ultraviolet radiation or extreme ultravioletradiation.
 14. A method for reducing the critical dimension of alithographically printed feature, according to claim 1, wherein saidultraviolet radiation comprises substantially monochromatic radiationhaving a wavelength of from about 157 nm to about 365 nm.
 15. A methodfor reducing the critical dimension of a lithographically printedfeature, according to claim 1, wherein said ultraviolet radiationcomprises substantially monochromatic radiation having a wavelengthselected from the group consisting of 157, 193, 248, 254, and 365 nm.16. A method for reducing the critical dimension of a lithographicallyprinted feature, according to claim 1, wherein said radiation comprisesx-ray radiation.
 17. A method for reducing the critical dimension of alithographically printed feature, according to claim 1, wherein saidphotoresist comprises a stable, etch-resistant, non-volatileoxide-forming material selected from the group consisting of silicon,phosphorous, germanium, aluminum, and boron.
 18. A method for reducingthe critical dimension of a lithographically printed feature, accordingto claim 1, wherein said plasma comprises a reactive species selectedfrom the group consisting of oxygen, hydrogen, fluorine, and chlorine.19. A method for reducing the critical dimension of a lithographicallyprinted feature, according to claim 1, wherein said tuned polymercomprises an organic polymer selected from the group consisting ofphenolic polymers, novolacs, epoxies, and diamond-like carbon.
 20. Amethod for producing a lithographically printed image having a reducedcritical dimension, according to claim 1, wherein transferring saidimage comprises plasma reactive-ion etching.
 21. A method for producinga lithographically printed image having a reduced critical dimension,according to claim 18, wherein said reactive species comprise neutralsand ions.
 22. A method for producing a lithographically printed imagehaving a reduced critical dimension, according to claim 1, whereinperforming controlled overetch comprises controlling the etch rate. 23.A method for producing a lithographically printed image having a reducedcritical dimension, according to claim 22, wherein controlling said etchrate comprises adding a non-reactive diluent gas to said plasma.
 24. Amethod for producing a lithographically printed image having a reducedcritical dimension, according to claim 23, wherein said non-reactivediluent gas comprises nitrogen and noble gasses.
 25. A method forproducing a lithographically printed image having a reduced criticaldimension, according to claim 22, wherein controlling said etch ratecomprises regulating process parameters.
 26. A method for producing alithographically printed image having a reduced critical dimension,according to claim 22, wherein said process parameters consist ofvariables selected from the group consisting of the duration of etch,the rf power, operating pressure, gas flowrates, backside He pressure,electrode temperature, and wall temperature.
 27. The reduced criticaldimension bilayer resist image comprising: a semiconductor substrate; anorganic layer provided on said substrate; and a photoresist layerprovided on said organic layer, wherein said photoresist layer has afirst image developed therein, and wherein said organic layer has asecond image, of reduced critical dimension and congruent with saidfirst image, developed therein.
 28. A method of using a reduced criticaldimension bilayer resist image comprising the steps of: (a) providing asubstrate; (b) forming a reduced critical dimension bilayer resist imageon said substrate; (c) transferring said image into said substrateforming a circuit image; and (d) forming circuit element materials insaid circuit image.
 29. A method of using the reduced critical dimensionbilayer resist image, according to claim 25 wherein said circuit elementmaterials comprise materials selected from the group consisting ofdielectric, conductor, semiconductor, and doped semiconductor materials.30. The semiconductor device fabricated using a reduced criticaldimension bilayer resist image.